DEPARTMENT OF ELECTRONICS AND COMMUNICATION
INDIAN INSTITUTE OF TECHNOLOGY ROORKEE
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Sudeb Dasgupta
Professor
sudeb.dasgupta[at]ece.iitr.ac.in
+91-1332-285666
https://sudebdasgupta.wixsite.com/sudebdasgupta
Research Interests

Biosketch
Educational Details
Professional Background

Research
Projects
Publications
Patents
Books
Collaborations

Honours and Awards
Honors
Memberships

Teaching Engagements
Teaching Engagements

Students
Supervisions
Associate Scholars

Miscellaneous
Events
Visits
Administrative Positions
Miscellaneous
Research Interests
Ultra Low Power, Adiabatic Logic for Portable Applications, Low Power Application, Subthreshold Logic Design, Radiation Effects on ICs, Design and Development of 6T FinFET Based Rad Hard SRAM Cell, Novel Semiconductor Devices, FinFETs, PDSOI, FDSOI, Nanoelectronics, Semiconductor Device Modelling
BioSketch
Educational Details
Banaras Hindu University
2000
Ph.D, Electronics Engineering
Professional Background
Technical Committee Member
01 Jan 1998 - 01 Jan 2000
VISION-2000
Reviewer
01 Jan 2004 - Present
International VLSI Design Conference
Assistant Professor
01 Jan 2005 - 01 Jan 2006
Indian School of Mines, Dhanbad
Assistant Professor
01 Jan 2006 - Present
Indian Institute of Technology, Roorkee
Reviewer
01 Jan 2006 - Present
IEEE Transactions on Nanotechnology
Reviewer
01 Jan 2003 - Present
VLSI Design and Test Symposium
Research
Projects
TOPIC START DATE FIELD DESCRIPTION FINANCIAL OUTLAY FUNDING AGENCY OTHER OFFICERS
Modelling and Simulation of Nanoscale MOSFET for their use in future VLSI/ULSI schemes 01 Jan 2003 Modelling and Simulation of Nanoscale MOSFET for their use in future VLSI/ULSI schemes Rs.6.00 lacs Ministry of Human Resources and Development, GOI
SMDP-C2S 01 Jan 2015 SMDP-C2S 1.5 crores DEITY Anand Bulusu
SMDP-II, http://192.168.121.8/departments/ECE/uploads/File/smdp/index.html 01 Jan 2005 SMDP-II, http://192.168.121.8/departments/ECE/uploads/File/smdp/index.html Rs. 59.00 lacs Ministry of Information and Communication Technology, Government of india Dr. R. C. Joshi




Publications
Semi-numerical Modelling of an n-channel Irradiated MOSFET
By: S.Dasgupta and P.Chakrabarti
Published in: International Journal of Electronics Vol: 88 (Pg 301-313) Date: 2001
Influence of Ionising Radiation on CMOS Inverters
By: S.Dasgupta, R.K. Chauhan and P. Chakrabarti
Published in: Microelectronics Journal (Elsevier) Vol: 32 (Pg 615-620) Date: 2001
Ionising Radiation effects in an Ion-Implanted MOSFET: A Two-Dimensional Analytical Study
By: S.Dasgupta, R.K. chauhan, G. Singh and P. Chakrabarti
Published in: International Journal of Electronics Vol: 89 (Pg 277-288) Date: 2002
A pseudo-two-dimensional model of an n-channel MOSFET under the influence of Ionising Radiation
By: S.Dasgupta, R.K. Chauhan and P. Chakrabarti
Published in: Semiconductor Science and Technology (IOP) Vol: 17 (Pg 961-968) Date: 2002
Two-Dimensional Numerical Modeling of a deep sub-micron Irradiated MOSFET to extract its Global Char
By: S.Dasgupta
Published in: Semiconductor Sceince and Technology (IOP) Vol: 18 (Pg 124-132) Date: 2003
Self-consistent Solution of Two-dimensional Poisson Equation and Schrodinger Wave Equation for Nano-
By: Deepesh Jain and S.Dasgupta
Published in: Journal of Nanoscience and Nanotechnology (APS) Date: 2004
Two-dimensional numerical modeling of lightly doped nano-scale double-gate MOSFET
By: Deepanjan Datta, A.A.P.Sarab and S.Dasgupta
Published in: Journal of Computational and Theoretical Nanoscience Vol: 3 (Pg 414-422) Date: 2005
Study of the Leakage Current in Novel Nanoscale Device Architecture depending on Doping Profile
By: D.Datta and S.Dasgupta
Published in: Journal of Computational and Theoretical Nanoscience Vol: In press Date: 2006
Self-Consistent Solutions of 2D-Poisson and Schrodinger Wave Equations for a Gaussian Doped 50 nm MO
By: A. Agrawal and S.Dasgupta
Published in: Journal of Computational and Theoretical Nanoscience Vol: 3 (Pg 101-109) Date: 2006
Design and Development of Ultra Low Power MOS based VLSI Architecture
By: Deepanjan Datta and S.Dasgupta
Published in: Journal of Computational and Teoretical Nanoscience (APSBS) Vol: 3 (Pg 01-11) Date: 2006
Two-Dimensional Analytical Modeling of Gaussian Doped Nano-scale Double-gate MOSFET
By: D.Datta, A.A.P.Sarab and S.Dasgupta
Published in: Microelectronics Journal (Elsevier) Vol: 37 (Pg 537-545) Date: 2006 (online)
Nanoscale Device Architecture to Reduce Leakage Current through QM Modelling Schemes in current VLSI Technology Node
By: A.A.P.Sarab, Deepanjan Datta and S.Dasgupta
Published in: Virtual Journal of Nanoscale Science and Technology Vol: 00 (Pg 1384-1397) Date: 2006
Novel Design Technique to reduce off state power dissipation in MOS based devices: A QM Study
By: Deepanjan Datta, Samiran Gangulay, A.A.P.Sarab and S.Dasgupta
Published in: Journal of Vacuum Science and Technology-B Vol: 24 (Pg 1384-1397) Date: 2006
Novel Nanoscale Device architecture to reduce Leakage Currents in Logic Circuits: A Quantum-Mechanic
By: D.Datta, S. Ganguly, A.A.P.Sarab and S.Dasgupta
Published in: Semiconductor Science and Technology (IOP) Vol: 21 (Pg 397-408) Date: 2006
Modeling and Simulation of the Nanoscale Triple-Gate
By: Deepanjan Dutta, A.A.P.Sarab and S.Dasgupta
Published in: Journal of Nanoscience and Optoelectronics Vol: 01 (Pg 1-14) Date: 2006
Low Band-to-Band Tunnelling and Gate Tunnelling Current in Novel Nanoscale Double-Gate Architecture: Simulations and Investigation
By: Deepanjan Dutta, samiran Ganguly and S.Dasgupta
Published in: Nanotechnology (IOP) Vol: 18 (Pg -) Date: 2007
Analytic Modeling of Non-Uniform Graded Dopant Profile of Polysilicon Gate in Gate Tunelling Current for N-MOSFET in Nanoscale Regime
By: Ashwani Kumar and S.Dasgupta
Published in: Journal of Computational and Theoretical Nanoscience Vol: 4 (Pg 179-185) Date: 2007
Unified Compact Modelling of a Gate Tunneling current considering Image Forge Barrier Lowering for nanoscale N-MOSFET
By: Ashwani Kumar and S.Dasgupta
Published in: Journal of Computational and Theoretical Nanoscience Vol: 4 (Pg 482-487) Date: 2007
Analysis and Evaluation of Output characteristics of Gaussian doped Nanoscale MOSFET using Green's
By: Ritambhar Roy and S.Dasgupta
Published in: Journal of Computational and Theoretical Nanoscience Vol: 3 (Pg 811-817) Date: 2006
Quantum Mechanical Treatment for the reduction of various leakage components in novel nanocscale MOS
By: Deepanjan Datta, A.A.P.Sarab and s.Dasgupta
Published in: Journal of Nanoscience and Optoelectronics Vol: 01 (Pg 237-250) Date: 2006
Evaluation of Threshold Voltage for 30 nm Symmetric Double Gate (SDG) MOSFET and it’s Variation with Process Parameters
By: S. K. Vishvakarma, B. Raj, A. K. Saxena, Rahul Singh, Chinmaya R. Panda and S. Dasgupta
Published in: Journal of Computational and Theoretical Nanosciences , American Scientific Publishers (ASP) Vol: in press (Pg Accepted) Date: 0/0/0000
Two Dimensional Analytical Potential Modeling of Nanoscale Symmetric Double Gate (SDG) MOSFET with Ultra Thin Body (UTB)
By: S. K. Vishvakarma, Vinit Agrawal, B. Raj, S. Dasgupta, A. K. Saxena
Published in: Journal of Computational and Theoretical Nanoscience Vol: 4 (Pg 1144-1148) Date: Sept. 2007
Modeling of Inversion Charge Density in Nanoscale Symmetric Double Gate (SDG) MOSFET: An analytical Approach
By: S. K. Vishvakarma, B. Raj, A. K. Saxena and S. Dasgupta
Published in: Journal of Nanoelectronics and Optoelectronics, American Scientific Publishers (ASP) Vol: 2 (Pg in press) Date: 2007
Honors And Awards
Honors
The Global Open University, The Netherlands
2001
Expert Member
Department of Science and Technology, GOI
1997
Senior REsearch Fellow
Marquis
2006
Marquis's Who's Who in Science in Engineering, USA
IWPSD-2005
2005
Best Paper Award
International Conference on Micro-to-Nano
2006
Technical Commitee Member
Politechnico di torino
2010
Erasmus Mundus Fellow
University of Wisconsin, Madison, USA
2011
IUSSTF Fellow
TU, Dresden, Deutschland
2013
DAAD Fellow
MemberShips
EDS
31 Aug 2020 - Present
Member
ISTE
31 Aug 2020 - Present
Member
Institute of Nanotechnology
31 Aug 2020 - Present
Associate Member
IEEE
31 Aug 2020 - Present
Member
Teaching Engagements
Teaching Engagements
Electronic Network Theory ( EC-291 )
Spring
digital Electronics ( EC-203 )
Autumn
Lab-II ( EC-650 )
Spring
Semiconductor Device Models for Circuit Simulation ( EC-502 )
Autumn
Semiconductor Device Lab ( EC-550 )
Autumn
Analog VLSI Design ( EC-558 )
Autumn
Semiconductor LAB ( EC-351 )
Autumn
Digital VLSI Design ( EC-557 )
Spring
VLSI Technology ( EC-555 )
Spring
Students
SuperVisions
Modelling and Simulation of Nanoscale Metal Oxide Semiconductor Feild Effect Transistors
31 Aug 2020 - Present
Other Supervisors: Prof.S.K.Paul, ISM, Dhanbad, Scholar: A. Annada Prasad Sarab
Analytical Modeling of Nanoscale MGDG MOSFET and its Application to SRAM
31 Aug 2020 - Present
Other Supervisors: Prof. A. K. Saxena, E&CE, Scholar: S. K. Vishvakarma
Analytical Modeling of Double Gate FinFET and its Applications to SRAM Cell Design
31 Aug 2020 - Present
Other Supervisors: Dr. A.K. Saxena, EC&E, Scholar: Balwinder Raj
Sub threshold Logic Design for Low Power Applications
31 Aug 2020 - Present
Other Supervisors: Prof.R.P.Agrawal, E&CE, Scholar: Ramesh Vaddi
Radiation Effect on SOI based devices and circuits
31 Aug 2020 - Present
Other Supervisors: Prof. A.K.Saxena, E&CE, Scholar: Surendra Rathod
Adiabatic Circuits
31 Aug 2020 - Present
Other Supervisors: , Scholar: Jitendra Kanungo
Silicon Nanowires
31 Aug 2020 - Present
Other Supervisors: Dr. Sanjeev Manhas, Scholar: Gaurav Kaushal
FinFET Design Issues
31 Aug 2020 - Present
Other Supervisors: A.K.Saxena, Scholar: Ashutosh Nandi
Robust Nanoscale Circuit Studies
31 Aug 2020 - Present
Other Supervisors: Dr. Anand Bulusu, Scholar: Naushad Alam
Variability studies in decanano FiNFET based circuits and systems
31 Aug 2020 - Present
Other Supervisors: Anand Bulusu, Scholar: Menka
FinFETs for RF Applications
31 Aug 2020 - Present
Other Supervisors: M.V.Karthikeyan, Scholar: Savitesh Sharma
DESIGN OF LOW POWER DIGITAL FILTER
31 Aug 2020 - Present
Other Supervisors: , Scholar: Kshipra Jain, Sonal Tyagi and Sujit Kumar
A CMOS Phase Frequency Detector for High Speed PLL with Linear Phase Transfer Characteristics
31 Aug 2020 - Present
Other Supervisors: , Scholar: Mohammed Khadar
Compact Analytical Modelling of Gate Leakage Current with S/D overlap for Nanoscale N-MOSFET
31 Aug 2020 - Present
Other Supervisors: , Scholar: Ashwani Rana
Designing of ALU for a 16-bit RISC Microprocessor Architecture
31 Aug 2020 - Present
Other Supervisors: , Scholar: Avnish Varshney
Associate Scholars
Annada Sarab
Modeling and Simulation of Quantum Effect in Nanoscale MOSFET
Balwinder Raj
FinFet Device Modeling and Nanoscale Memory Design
V. Ramesh
Low Power VLSI Design
Surendra Rathod
Study of Radiation Effects on SOI based devices and circuit
Jitendra Kanungo
Adiabatic Logic Design
Ashutosh Nandi
Dual-k FinFET based Analog Design
Pankaj Pal
SRAM memory design enhancements using sub 22 nm devices
Miscellaneous
Events
Instruction Enhancement Programme
31 Aug 2020 - Present
IIT-Kanpur/ SMDP-II
STEP-VHDL
31 Aug 2020 - Present
STEP/IITR
Visits
UNIK, Norway
2009-01-01
Joint Research
Politechnico Di Torini, Italy
2010-01-01
Research, EM Fellow
University of Wisconsin-Madison
2011-01-01
Indo US Fellowships, Collaborative Research
Administrative Positions
Chairman, DAPC
01 Jan 2015 - 01 Jan 2017
IIT Roorkee
O.C. VLSI Design Lab
01 Jan 2006 - 01 Jan 2011
IIT Roorkee
Member, Institute Web-site Committee
01 Jan 2005 - 01 Jan 2005
Indian School of Mines, Dhanbad
Member, time-Table Commitee
01 Jan 2002 - 01 Jan 2005
Indian School of Mines, Dhanbad
Member, Departmental Research Commitee
01 Jan 2003 - 01 Jan 2005
Indian School of Mines, Dhanbad
Member Secretary, Board of Courses and Studies
01 Jan 2003 - 01 Jan 2004
Indian School of Mines, Dhanbad
Member, Tender Adisory Committee
01 Jan 2000 - 01 Jan 2005
Indian School of Mines, Dhanbad
Co-Coordinator
01 Jan 2006 - Present
IIT-R SMDP For VLSI Design and Related S/W - Phase-II
O.C.
01 Jan 2006 - Present
Solid State Devices (R&D) Lab
Member
01 Jan 2007 - Present
DUGC, E&CE
Warden
01 Jan 2001 - 01 Jan 2003
Indian School of Mines, Dhanbad
Member, Research Council
01 Jan 2003 - 01 Jan 2005
Indian School of Mines, Dhanbad
Member, Academic Council
01 Jan 2002 - 01 Jan 2003
Indian School of Mines, Dhanbad